Thursday, October 27, 2022

 I just committed code that passes al of the hardware tests on hardware.  EXCEPT the EAE tests.

I can now start debugging them.  I would have like to debug in simulations but my computer is not up to it.  It takes too long and I run out of memory.


Saturday, October 15, 2022

Some notes on the state machine:

Inputs to the state machine are: 

    instruction

    EAE mode bit

    EAE_loop

    halt

    single step

    continue

    trigger from the front panel

outputs are: 

    current state

The EAE loop signal controls the exit from state EAE1.  The number of times EAE1 loops on itself is a function of the instruction (MUL), sometimes the word following the  instruction, (SHL, ASR, LSR), contents of AC (NMI)




Friday, October 14, 2022

 I have update the code yet again.  The state machine including the EAE is in pretty much its final form.



 I just committed working code for the EAE implementation.  This includes both the A and B modes of operation.   The logic utilization is:  ...